# Are Mitten Codes the Most Efficient qLDPC Architecture Yet?

A 975-physical-qubit mitten code encodes 195 [logical qubits](https://quantumintel.tech/glossary/logical-qubit) at a block logical error rate of 10⁻⁸ per syndrome extraction round — while outperforming a benchmark stack of 195 rotated surface codes built from more than 100,000 physical qubits by nearly two orders of magnitude in both qubit count and error rate. That is the headline claim from a Caltech and Oratomic, Inc. collaboration published on arXiv on August 3, 2026, under the title *"High-rate qLDPC processors."*

The paper introduces mitten codes, a new family of non-abelian quantum low-density parity-check (qLDPC) error-correcting codes. They achieve a constant 20% encoding rate — meaning one logical qubit for every five physical qubits — with a check weight of 9. Code distances of 18 to 24 and beyond are reachable using only a few hundred physical data qubits. The construction sidesteps the distance ceiling that handicaps abelian codes of equivalent base-matrix shape, where distances are often capped at 6. This is not an incremental update to existing qLDPC proposals; it represents a structurally different approach to [fault-tolerant quantum computing](https://quantumintel.tech/glossary/fault-tolerant-quantum-computing) with verified cross-platform hardware mappings.

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## What Makes Mitten Codes Structurally Different

Mitten codes are built as lifted product codes using classical base matrices over non-abelian groups, specifically C₅×S₃, C₄×D₁₀, and C₁₃⋊C₁₅. The non-abelian group structure is the key architectural lever: because abelian groups impose strict distance constraints on lifted product constructions, any qLDPC code family stuck in the abelian regime hits a ceiling that makes scaling expensive. Mitten codes escape that ceiling by design.

The canonical logical basis is equally important from an engineering standpoint. Every logical operator across all encoded logical qubits is related by the underlying non-abelian group action, meaning any logical operator can be mapped to any other through group operations. In practice, this produces a modular, reusable logical toolkit rather than a custom gadget for each qubit — a critical property for building programmable processors rather than fixed-function demonstrators.

Universal [Clifford gates](https://quantumintel.tech/glossary/clifford-gates) require only five reusable graph surgery gadgets, generated from two small seed gadgets. The architecture also supports parallel lattice surgery — measuring multiple logical qubit pairs simultaneously — and parallel magic-state injection across all logical qubits. The latter is particularly significant: [magic state](https://quantumintel.tech/glossary/magic-state) delivery is typically a throughput bottleneck in surface-code processors, so native parallel injection at the code level is a meaningful architectural advantage.

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## Decoder Performance: Billion-Operation Validation

A new fault-tolerant code is only as credible as its decoder, and the mitten code paper addresses this directly. The authors developed a telescoping decoder combining GPU-accelerated Belief Propagation kernels with exact integer-programming solvers.

The key benchmarks from the source:

- At a **0.1% physical error rate** under circuit-level depolarizing noise, a **300-data-qubit** mitten code achieved a block logical error rate of approximately **10⁻¹¹** per syndrome extraction round.
- At a **0.4% physical error rate**, a **975-data-qubit** code encoding **195 logical qubits** reached **10⁻⁸** per round — beating a 195-surface-code stack of more than 100,000 physical qubits on both qubit count and error rate by close to two orders of magnitude.
- Direct decoding of **15 billion surgery experiments** on a 540-data-qubit code produced only **two logical failures**, demonstrating capacity for over 10 billion logical operations with sub-millisecond average per-cycle decoding latency.

The sub-millisecond decoding claim is critical context for hardware teams. Slow decoders create backpressure that stalls logical clock cycles; a decoder that cannot keep pace with the hardware effectively wastes [coherence time](https://quantumintel.tech/glossary/coherence-time). The GPU-accelerated approach used here is consistent with the direction being explored by decoder specialists across the industry, but validating it at 15 billion experiments is an unusually large empirical demonstration for a preprint.

The [error threshold](https://quantumintel.tech/glossary/error-threshold) performance — remaining well [below threshold](https://quantumintel.tech/glossary/below-threshold) at 0.4% physical error rates for the largest tested code — is notable. Surface codes typically require physical error rates below roughly 1% to function, but the overhead to reach useful logical error rates at that threshold is enormous. The mitten code numbers suggest a much more favorable overhead curve, though independent replication will be needed before hardware teams commit roadmap resources.

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## Hardware Mapping: Neutral Atoms and Superconductors

The research team mapped mitten codes onto two distinct hardware platforms, which is analytically important — a code family with only one viable substrate has a narrow addressable market in a field where neutral atom and superconducting approaches are pursuing very different physical qubit parameters.

**Neutral atom arrays:** Non-local check measurements are executed by shuttling ancilla atoms via crossed Acousto-Optic Deflectors. The group product factorizations built into mitten codes allow atom movements to decompose into clean row shifts and column swaps. Estimated cycle times are between 5 and 15 milliseconds. For context, [neutral atom qubit](https://quantumintel.tech/glossary/neutral-atom-qubit) platforms have inherently longer gate times than superconducting qubits but have shown strong coherence and native connectivity advantages for non-local codes — exactly the regime qLDPC codes occupy.

**Superconducting chips:** Mitten codes were proven to have a planar thickness of 3, achieving hardware layout complexity scores on multi-chip stackups comparable to bivariate bicycle codes while encoding substantially more logical qubits per block. Bivariate bicycle codes have attracted significant attention as a near-term qLDPC target for superconducting hardware, so benchmarking directly against them is a deliberate positioning choice.

The dual-platform mapping, combined with the code discovery pipeline built around sQetch — a GPU-accelerated distance estimator the authors report operates up to 800,000 times faster than conventional tools — suggests Oratomic is positioning mitten codes as a platform-agnostic error correction layer rather than a hardware-specific optimization.

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## What the Skeptical Reading Looks Like

Several important caveats apply before treating these results as production-ready.

First, this is an arXiv preprint. Peer review has not yet validated the claims, and the decoder simulations — however large — are still simulations. Circuit-level depolarizing noise is a reasonable proxy for real hardware error models, but it is not the same as running on a physical device.

Second, Oratomic, Inc. is not a well-known entity in the public quantum hardware or software landscape. No funding amounts, team size, or hardware access details are provided in the source material. Whether the company has the experimental infrastructure to demonstrate mitten codes on physical qubits, or is primarily a theory and software organization, is unknown from available information.

Third, the comparison to 195 rotated surface codes is a strong benchmark, but the surface code stack is not optimized with advanced decoders or concatenation. Fair comparison to state-of-the-art surface code implementations — including those from [IBM Quantum](https://quantumintel.tech/companies/ibm) and [Google Quantum AI](https://quantumintel.tech/companies/google-quantum-ai), which have invested heavily in decoder optimization — would be more informative.

Fourth, the 5–15 millisecond cycle times on neutral atoms need to be weighed against the coherence properties of specific hardware implementations. Abstract cycle time estimates do not account for atom loss, mid-circuit measurement fidelity variation, or the overhead of the specific AOD shuttling sequences in practice.

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## Industry Trajectory Implications

qLDPC codes have moved from theoretical curiosity to serious engineering consideration over the past few years, driven by papers from researchers including those behind bivariate bicycle codes and related constructions. The mitten code paper accelerates that trajectory by demonstrating that non-abelian group structures — previously underexplored in this context — can unlock encoding rates and distance scaling that abelian constructions cannot reach.

For enterprise buyers and investors, the practical implication is that the physical-qubit-to-logical-qubit overhead ratio — the number that most directly determines when fault-tolerant quantum computing becomes economically viable at scale — may be substantially smaller than surface-code roadmaps currently assume. If mitten code claims survive independent verification and hardware demonstration, roadmap timelines built around million-physical-qubit surface-code processors may need revision.

The sQetch discovery pipeline is also worth watching separately. A distance estimator running 800,000 times faster than conventional tools is a research infrastructure asset: it means the design space of non-abelian qLDPC codes can be explored at a pace that was previously impractical, potentially yielding further improved code families.

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## Key Takeaways

- Mitten codes achieve a constant **20% encoding rate** with check weight 9, using non-abelian group structures (C₅×S₃, C₄×D₁₀, C₁₃⋊C₁₅) that bypass abelian distance limits capped at 6.
- A **975-data-qubit** code encoding **195 logical qubits** reaches 10⁻⁸ logical error rate per round, outperforming a 195-surface-code stack of more than **100,000 physical qubits** by nearly two orders of magnitude on both metrics.
- **15 billion surgery experiments** on a 540-data-qubit code produced only two logical failures, with sub-millisecond average per-cycle decoding latency using a GPU-accelerated telescoping decoder.
- Hardware mappings exist for both **neutral atom arrays** (5–15 ms estimated cycle times via AOD shuttling) and **superconducting multi-chip stackups** (planar thickness of 3, comparable complexity to bivariate bicycle codes).
- The **sQetch** automated discovery pipeline operates up to 800,000 times faster than conventional distance estimation tools, enabling systematic exploration of the non-abelian code space.
- Claims are from an **arXiv preprint** by Caltech and Oratomic, Inc.; peer review and physical hardware demonstration remain outstanding.

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## Frequently Asked Questions

**What are mitten codes in quantum error correction?**
Mitten codes are a family of non-abelian qLDPC error-correcting codes introduced by Caltech and Oratomic, Inc. They achieve a constant 20% encoding rate with check weight 9, using lifted product constructions over non-abelian groups to reach code distances of 18–24 and beyond with only a few hundred physical qubits.

**How do mitten codes compare to surface codes?**
According to the preprint, a 975-data-qubit mitten code encoding 195 logical qubits outperforms a benchmark stack of 195 rotated surface codes built from more than 100,000 physical qubits by nearly two orders of magnitude in both physical qubit count and logical error rate at a 0.4% physical error rate.

**Do mitten codes work on superconducting qubits or neutral atoms?**
Both. The paper maps mitten codes onto neutral atom arrays using AOD-based ancilla shuttling with estimated 5–15 millisecond cycle times, and onto superconducting multi-chip stackups with a proven planar thickness of 3, achieving layout complexity comparable to bivariate bicycle codes.

**What is the error threshold for mitten codes?**
The preprint demonstrates well-below-threshold performance at physical error rates of 0.1% and 0.4% under circuit-level depolarizing noise. At 0.4%, a 975-data-qubit code reaches 10⁻⁸ logical error rate per round.

**What is Oratomic, Inc. and what hardware do they have?**
Oratomic, Inc. is a company co-authoring the mitten code preprint with Caltech. No funding amounts, hardware access details, or further company information are provided in the source material available as of this writing.