## Are Photonic Quantum Computers Ready to Compete in 2026?

As of mid-2026, no photonic platform has demonstrated a peer-reviewed [logical qubit](https://quantumintel.tech/glossary/logical-qubit) — and [PsiQuantum](https://quantumintel.tech/companies/psiquantum)'s own Nature paper places [fault-tolerant quantum computing](https://quantumintel.tech/glossary/fault-tolerant-quantum-computing) at millions of physical qubits. That is the honest starting point for any assessment of photonic quantum computing. The architecture is technically compelling: photonic qubits — single particles of light — require no millikelvin cooling for the processor itself, sidestep the electrical noise that burdens superconducting platforms, and their waveguide chips are patterned on the same 300-millimetre production lines used for standard optical networking hardware. Yet the field's central promise — that the scaling problem is really a manufacturing problem, one the semiconductor industry has already largely solved — remains unproven at the qubit counts that matter for error-corrected computation. French firm Quandela publishes photon indistinguishability above 95%, and vendors including PsiQuantum, Quandela, and ORCA Computing each use distinct encodings — path, polarisation, and time-bin respectively — reflecting genuine architectural disagreement about the right road to scale. Here is what the technology actually does, where it is stalled, and what the unresolved engineering challenges mean for the broader quantum hardware race.

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## The Core Physics: What a Photonic Qubit Actually Is

A [photonic qubit](https://quantumintel.tech/glossary/photonic-qubit) is information encoded on a single particle of light. The dominant commercial encoding is dual-rail: one photon, two parallel waveguides etched into a chip. Assign the photon in the top waveguide to logical 0 and the photon in the bottom waveguide to logical 1. A beam splitter places that photon into a genuine superposition of both channels — and that is all a qubit requires.

The same logic extends to other encodings when hardware demands it. Polarisation encoding uses horizontal and vertical light in a single channel — structurally identical to dual-rail, just played out across polarisation modes rather than spatial paths. Time-bin encoding puts the photon into an early or late arrival slot, a format that survives long runs through optical fibre far better than path encoding does. ORCA Computing exploits time-bin encoding through fibre loops precisely for this reason. PsiQuantum uses path encoding on chip. Quandela does the same. The choice of encoding is not cosmetic: it cascades through every downstream design decision, from source architecture to gate topology to detector placement.

What all encodings share is a fundamental consequence of photon physics: photons do not interact. Two photons passing through the same waveguide simply pass through each other. This makes the two-qubit gates that other platforms implement through direct physical coupling impossible by the same mechanism. Photonic gates are instead constructed through interference and [measurement](https://quantumintel.tech/glossary/measurement) — probabilistic operations whose success is heralded by detector clicks. The entire computation must be choreographed in flight because photons cannot be stored, either.

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## The Source Problem: Why Single-Photon Emission Is Hard

Everything downstream depends on sources that emit exactly one photon, on demand. The traditional method — spontaneous parametric down-conversion, shining a laser through a nonlinear crystal — is inherently probabilistic. Increasing the pump power to generate pairs more reliably also increases the rate of unwanted double-pair events, which corrupt computation. The field has two answers.

**Multiplexing** runs many probabilistic sources in parallel and switches whichever one fired into the circuit, trading hardware complexity for improved reliability. **Deterministic sources** replace the crystal with a single quantum dot — an artificial atom grown in a semiconductor pillar — that emits one photon nearly every time it is addressed. Quandela builds its machines around quantum dots and reports photon indistinguishability above 95%, a measure of how nearly identical successive emitted photons are to one another. Indistinguishability sets the ceiling on interference visibility, which in turn sets the ceiling on gate fidelity. A source that emits slightly different photons each time is a source that introduces errors at every gate.

The source problem is arguably the field's deepest hardware constraint. A fault-tolerant photonic machine will need sources that are simultaneously bright, deterministic, and highly indistinguishable — and the three properties are in tension with each other in current semiconductor systems.

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## The Programmable Mesh: Glass as Software

The processor itself is a mesh of beam splitters and phase shifters. A result from 1994, refined into the standard layout the industry uses today in 2016, established that any linear optical transformation across N channels can be decomposed into a grid of exactly these two components. Program the phase shifter settings and you have programmed the machine — there is no other layer of software in the classical sense.

The workaday phase shifter uses a microscopic heater to thermally expand the glass waveguide beneath it. Thermal phase shifters are cheap to fabricate but slow to switch. The next generation uses electric fields rather than heat, in materials such as thin-film lithium niobate, achieving switching speeds orders of magnitude faster — a requirement for any practical gate-speed comparison with superconducting or trapped-ion platforms.

A programmable splitter is realised as a Mach-Zehnder interferometer: two fixed directional couplers wrapped around a phase shifter. The mesh of these elements is the entire quantum processor. Unlike a transmon chip, there is no on-chip classical control electronics operating at millikelvin temperatures. The photons propagate at room temperature through the waveguide layer; only the superconducting nanowire single-photon detectors at the output require cooling, though not to the millikelvin depths of a full dilution refrigerator.

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## Loss: The Error Mechanism That Doesn't Respond to Shielding

Superconducting qubits decohere — they lose quantum information to their environment over a characteristic T1/T2 timescale, and that decoherence can in principle be reduced by better isolation and materials engineering. A lost photon is categorically different. It simply does not arrive at the detector. The information it carried is gone, with no recovery mechanism. Every component in a photonic system — source, waveguide, coupler, phase shifter, detector — is therefore judged primarily on insertion loss, the fraction of photons it fails to pass.

This makes loss the dominant error mechanism in photonic systems, in the same way that [decoherence](https://quantumintel.tech/glossary/decoherence) is the dominant error in superconducting systems. Quantum error correction for photonic platforms must therefore be designed around erasure errors — known-location losses — rather than Pauli errors, which is genuinely a different and in some respects more tractable error model. Whether that structural advantage translates into a lower physical-qubit overhead for fault tolerance at scale is the open research question that PsiQuantum's Nature paper addresses, with the answer of millions of physical qubits setting the ambition of the engineering program.

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## The Manufacturing Bet and What It Actually Requires

The photonic industry's central thesis is that silicon photonics fabs — the same 300-millimetre production lines used for optical networking transceivers — can manufacture quantum processors at a scale and yield that no cryogenic platform can match. This is a real and important structural advantage if the other components scale with it.

The catch is that the detectors do not yet scale the same way. Superconducting nanowire single-photon detectors, which resolve individual photons with high efficiency and low timing jitter, require cooling to a few kelvin — not millikelvin, but still cryogenic. A photonic fault-tolerant machine will need very large numbers of these detectors operating in parallel. The cryogenic infrastructure for the detector layer, not for the processor, is a significant and underappreciated cost and engineering challenge in scaled photonic architectures.

The squeezed-light approach, pursued by continuous-variable machines, encodes information in the amplitude and phase of a light field rather than in discrete single photons. Both discrete-variable and continuous-variable photonic machines are being built commercially. The two approaches have different error models, different source requirements, and different paths to fault tolerance — and the industry has not yet converged on which will reach the [error threshold](https://quantumintel.tech/glossary/error-threshold) first.

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## Industry Trajectory: What the Photonic Position Means for the Hardware Race

The honest competitive assessment is this: photonic platforms trade a solved manufacturing process for three unsolved physics problems — probabilistic gates, photon loss without recovery, and detector scaling. The manufacturing thesis is credible; the physics timeline is not yet validated. No peer-reviewed logical qubit demonstration from a photonic platform exists as of mid-2026. PsiQuantum's fault-tolerance analysis requiring millions of physical qubits places the full error-corrected system in a construction-scale challenge that dwarfs anything currently on any platform's roadmap.

That said, the erasure-error structure of photon loss may prove genuinely favourable for certain QEC codes, and the room-temperature processor is a real differentiator for data-centre integration. ORCA Computing's time-bin approach through fibre loops suggests a near-term path toward modular, networked architectures that could be competitive in quantum networking before full fault tolerance is achieved.

For enterprise buyers and investors, the photonic value proposition in 2026 is not near-term [NISQ](https://quantumintel.tech/glossary/nisq) compute — photonic NISQ machines are not competitive on circuit depth or gate count with leading superconducting or trapped-ion systems. It is a long-duration bet on manufacturing-led scale, contingent on solving source indistinguishability, gate success probability, and detector integration simultaneously.

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## Key Takeaways

- As of mid-2026, **no photonic platform has demonstrated a peer-reviewed logical qubit**.
- PsiQuantum's Nature paper places fault-tolerant operation at **millions of physical qubits** — a construction-scale challenge, not an engineering refinement.
- The central encoding is **dual-rail**: one photon in two waveguides, with beam splitters and phase shifters forming the entire programmable processor.
- **Loss is the dominant error mechanism** — a photon that vanishes cannot be recovered, unlike decoherence in other platforms, making erasure-error-aware QEC codes the relevant design target.
- **Quandela** reports photon indistinguishability above **95%** from quantum-dot sources; PsiQuantum and ORCA Computing use different encodings (path and time-bin respectively), reflecting genuine architectural disagreement.
- Photonic processor chips come off **300-millimetre semiconductor production lines**, but the superconducting nanowire detectors still require cryogenic infrastructure — a critical and often underweighted scaling bottleneck.
- The photonic value proposition in 2026 is a **long-duration manufacturing bet**, not near-term compute competitiveness.

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## Frequently Asked Questions

**Do photonic quantum computers need to be cooled?**
The waveguide processor itself operates at room temperature — a genuine differentiator versus superconducting transmon chips that require millikelvin dilution refrigerators. However, the superconducting nanowire single-photon detectors at the output require cryogenic cooling to a few kelvin. A scaled photonic machine still has a cryogenic subsystem; it is smaller and less extreme than a full superconducting processor, but it is not absent.

**What is dual-rail encoding in photonic quantum computing?**
Dual-rail encoding uses one photon and two parallel waveguides. The photon in the top waveguide represents logical 0; the photon in the bottom waveguide represents logical 1. A beam splitter can place the photon into a superposition of both channels, realising a qubit. It is the dominant encoding in chip-based photonic systems used by PsiQuantum and Quandela.

**Why can't photons be used to make two-qubit gates directly?**
Photons do not interact with each other under normal conditions. Two photons passing through the same waveguide simply pass through each other without exchanging energy or phase. Two-qubit gates in photonic systems must therefore be constructed indirectly, using interference and measurement — a probabilistic process whose success is signalled by detector clicks, unlike the deterministic gates available on superconducting or trapped-ion platforms.

**Has any photonic company demonstrated a logical qubit?**
No. As of mid-2026, no photonic platform has demonstrated a peer-reviewed logical qubit. PsiQuantum's published analysis in Nature identifies fault-tolerant operation as requiring millions of physical qubits — a target that defines the scale of the engineering program ahead.

**What is the difference between discrete-variable and continuous-variable photonic quantum computing?**
Discrete-variable (DV) machines encode information in individual photons — typically using dual-rail or time-bin encoding. Continuous-variable (CV) machines encode information in the amplitude and phase of a light field (squeezed light), without requiring single-photon resolution. Both approaches are being developed commercially. They have different error models, different source requirements, and different proposed paths to fault tolerance.