## Can Q-CTRL's 100-Qubit QFT on IBM Heron Change Pre-Fault-Tolerant Benchmarks?

A 100-qubit Quantum Fourier Transform — double the size of any previously reported experimental QFT — is the headline result from Q-CTRL's latest technical manuscript, published August 10, 2026. The demonstration was executed on [IBM Quantum](https://quantumintel.tech/companies/ibm)'s 156-qubit Heron r3 processor, using a combination of convolutional compilation and active error suppression developed by Q-CTRL. The team tested quantum registers at three sizes — 50, 80, and 100 qubits — encoding periodic signals into each and requiring the QFT to isolate a single correct frequency from a search space that Q-CTRL describes as exceeding 10^30 possible wrong answers at the 100-qubit scale (a Hilbert space of dimension 2¹⁰⁰). At all three register sizes, shot-averaged statistics resolved the exact target frequency. Q-CTRL claims this is the largest experimental QFT on any quantum hardware to date, by a factor of two. The result is notable not because the QFT is itself a useful standalone application, but because it is a core algorithmic subroutine in phase estimation and Shor's algorithm — making its scalability a meaningful proxy for broader pre-fault-tolerant circuit capability.

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## What Q-CTRL Actually Demonstrated

The Quantum Fourier Transform is one of the most gate-intensive subroutines in the standard quantum algorithm toolkit. Its circuit depth scales as O(n²) in the naive implementation — meaning that on [NISQ](https://quantumintel.tech/glossary/nisq)-era hardware, error accumulation and qubit routing overhead have historically capped practical execution well below 100 qubits.

Q-CTRL's approach combined two techniques:

**Convolutional compilation** — a hardware-aware strategy that reduces gate counts beyond what standard transpilation achieves by structuring gates to reflect the physical connectivity and noise characteristics of the target chip. The source material does not provide specific two-qubit gate counts or reduction percentages, so those comparisons cannot be made precisely here, but Q-CTRL describes the theoretical gate efficiency of the Convolutional QFT as the "foundation" for the physical experiment.

**Active error suppression** — Q-CTRL's Fire Opal platform applies real-time error suppression during circuit execution, mitigating coherent and incoherent noise without the overhead of full quantum error correction. This is distinct from post-hoc error mitigation techniques applied in classical post-processing.

The combination, Q-CTRL argues, is what pushed the experiment past prior limits. Neither technique alone, the manuscript implies, would have been sufficient.

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## The Benchmark: One Correct Answer in 10^30

The specific test Q-CTRL chose is worth examining closely. Rather than benchmarking raw process fidelity across the full 100-qubit state — which would be both experimentally intractable and theoretically uninformative — they encoded a known periodic signal and asked whether the QFT could recover the single correct frequency.

This is a practically motivated benchmark. The QFT's utility in algorithms like Shor's or quantum phase estimation depends entirely on its ability to extract global periodicity information from a quantum register — exactly what this test measures. The metric is binary in a meaningful sense: did you find the right frequency or not?

Q-CTRL reports that at all three tested register sizes (50, 80, and 100 qubits), averaging over shot statistics recovered the exact target frequency. They note that process [gate fidelity](https://quantumintel.tech/glossary/gate-fidelity) does decrease as register size increases — which is expected and honest — but that the frequency-resolution task remained solvable despite that degradation.

This is a key distinction: the experiment does not claim that 100-qubit process fidelity is high in absolute terms. It claims that a specific, algorithmically relevant task — frequency identification — remained successful even as fidelity declined with scale. Those are different claims, and the first would be far harder to support.

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## IBM Heron r3 as the Platform

The choice of IBM's 156-qubit Heron r3 processor is relevant context. The Heron architecture was designed with reduced crosstalk relative to IBM's earlier Eagle and Osprey generations, using tunable couplers and a heavy-hexagon connectivity graph. Q-CTRL's source material specifically credits the hardware's ability to "maintain coherence and low gate errors across a 100-qubit linear chain" as a contributor to the result.

This is a two-way validation: Q-CTRL's software stack demonstrated what it can extract from current superconducting hardware, and IBM Heron r3 demonstrated that its physical qubit quality can support a 100-qubit structured circuit well enough for algorithmically meaningful outputs. Neither party's contribution is trivially separable from the other — which is precisely the point of software-hardware co-optimization.

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## Skeptical Analysis: What This Result Does and Doesn't Prove

Several important caveats apply before treating this as evidence that pre-fault-tolerant quantum computers are closing in on useful computation:

**The QFT alone is not a useful computation.** It is a subroutine. Demonstrating a 100-qubit QFT says that this subroutine can now be embedded into larger circuits at greater scale than previously shown — but the complete algorithms (Shor's, phase estimation) that would make the QFT industrially relevant require error rates well below what current hardware achieves across full circuit depths. No fault-tolerant quantum computation claim is being made here.

**Shot averaging is doing real work.** The frequency-identification benchmark works by aggregating measurement outcomes across many shots. This is a legitimate technique — it is essentially how all near-term quantum algorithms operate — but it means the result is a statistical ensemble outcome, not a demonstration of single-shot correctness. As circuits grow more complex and deeper, the number of shots required to extract a reliable signal can become a practical constraint on [CLOPS](https://quantumintel.tech/glossary/clops)-limited hardware.

**"Factor of two" record claims need peer context.** Q-CTRL states this is the largest experimental QFT "by a factor of two." The source does not name the prior record holder or cite a specific reference, making independent verification of that claim difficult without accessing the full manuscript. The claim may be entirely accurate — it is consistent with what is publicly known about QFT demonstrations — but it should be treated as Q-CTRL's assertion until the manuscript is peer-reviewed.

**This is a company blog post, not a published paper.** The source material references a "technical manuscript," but the article itself is a blog post on q-ctrl.com. Peer review may strengthen, qualify, or complicate the reported results.

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## What This Means for the Broader Industry

Taken at face value, this result advances a specific thesis that is increasingly central to the pre-fault-tolerant quantum computing argument: that software-layer optimization — compilation strategy, error suppression, and algorithmic benchmarking design — can unlock meaningful computation from current hardware even before [fault-tolerant quantum computing](https://quantumintel.tech/glossary/fault-tolerant-quantum-computing) arrives.

This is Q-CTRL's commercial thesis. Their Fire Opal platform is a direct monetization of this capability — enterprise and research users pay to run circuits on quantum cloud services with Q-CTRL's stack applied on top. A 100-qubit QFT demonstration is a credible reference result for that sales motion.

For hardware vendors, particularly IBM, results like this are also valuable: they demonstrate that the Heron r3 generation has enough physical qubit quality to support software teams extracting increasingly structured computations. That reduces the pressure on IBM to deliver dramatic qubit-count increases in the near term and shifts focus toward the software-hardware integration story.

For the broader NISQ-to-fault-tolerant transition, this result is best interpreted as establishing a new experimental floor for what pre-fault-tolerant hardware can support algorithmically — not a proof of near-term quantum utility for commercial problems, but a meaningful data point that the algorithmic building blocks for future fault-tolerant algorithms can be stress-tested at scale today.

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## Key Takeaways

- Q-CTRL demonstrated a 100-qubit Quantum Fourier Transform on IBM's 156-qubit Heron r3 processor, which the company claims is the largest experimental QFT on any quantum hardware to date by a factor of two.
- The demonstration tested quantum registers at 50, 80, and 100 qubits; at all sizes, shot-averaged results resolved the single correct target frequency from a search space described as exceeding 10^30 wrong answers at 100 qubits.
- Success required combining Q-CTRL's convolutional compilation strategy with active error suppression — standard transpilation alone was insufficient.
- Process fidelity does decrease with register size; the benchmark measures frequency-identification success rather than raw state fidelity, which is an important distinction.
- The result is a demonstration of pre-fault-tolerant algorithmic subroutine scalability, not a claim of practical quantum utility or fault-tolerant computation.
- The source is a company blog post referencing an unpublished technical manuscript; peer review has not yet been completed.

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## Frequently Asked Questions

**What is a Quantum Fourier Transform and why does it matter?**
The QFT is a quantum analog of the discrete Fourier transform, used as a core subroutine in several important quantum algorithms including Shor's algorithm for integer factoring and quantum phase estimation. Its scalability on real hardware is a direct measure of how close pre-fault-tolerant processors are to supporting those algorithms in practice.

**What did Q-CTRL demonstrate on IBM hardware?**
Q-CTRL executed a QFT on a 100-qubit register using IBM's 156-qubit Heron r3 processor. They encoded periodic signals into quantum registers of 50, 80, and 100 qubits and showed that shot-averaged results correctly identified the target frequency at all three scales. They describe this as the largest experimental QFT demonstrated on any quantum hardware, by a factor of two.

**Why did this require more than standard compilation?**
Large-scale QFT circuits accumulate significant errors through gate depth, qubit routing, and noise propagation. Standard transpilation optimizes for logical correctness but does not account for the specific noise landscape of a physical chip. Q-CTRL's approach combined hardware-aware convolutional compilation to reduce gate counts with active error suppression to mitigate noise during execution.

**Does this mean quantum computers can now run Shor's algorithm at scale?**
No. The QFT is one subroutine within Shor's algorithm; the complete algorithm at cryptographically relevant scales requires error rates and circuit depths that remain far beyond current pre-fault-tolerant hardware. This result shows the subroutine can scale to 100 qubits on current hardware, which is a meaningful advance in itself but not equivalent to a complete useful algorithm.

**What hardware did Q-CTRL use, and why does it matter?**
The experiment ran on IBM's 156-qubit Heron r3 superconducting processor. Q-CTRL credits the hardware's coherence and low gate error rates across a 100-qubit linear chain as essential to the result. The Heron architecture uses tunable couplers designed to reduce crosstalk relative to earlier IBM generations, which supports deeper, wider circuits before error rates become prohibitive.