## Can Quantum Dot Qubits Scale to Billions on a Single Chip?
SLAC National Accelerator Laboratory scientist Shannon Harvey is working toward quantum dot chips that could host millions — or even billions — of qubits on a surface the size of a drink coaster, according to a profile published July 14, 2026 by HPCwire. Harvey works within Q-NEXT, a DOE National Quantum Information Science Research Center led by Argonne National Laboratory in partnership with SLAC. The core technical challenge she is solving: quantum dots are inherently noisy at scale, and that noise destroys [coherence time](https://quantumintel.tech/glossary/coherence-time) — the very property that makes a qubit useful.
Quantum dots confine an electron to a space smaller than its own wavelength, forcing it into discrete, controllable energy states. That discreteness is what enables information storage and manipulation. Unlike superconducting transmon qubits or trapped-ion systems, quantum dots are semiconductor-compatible and, in principle, manufacturable using existing semiconductor fabrication infrastructure. That manufacturability is the central argument for the platform — and the reason it has attracted sustained DOE investment through Q-NEXT.
Harvey's work sits at the intersection of materials science, cryogenic engineering, computer science, and basic physics. She operates out of the SLAC Millikelvin Facility, where the operating temperatures required for quantum dot experiments place her research adjacent to cosmology detector teams — a cross-disciplinary proximity she describes as directly informing her own methods.
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## The Scalability Argument for Quantum Dots
Among the competing [physical qubit](https://quantumintel.tech/glossary/physical-qubit) modalities — superconducting, trapped ion, [neutral atom](https://quantumintel.tech/glossary/neutral-atom-qubit), [photonic](https://quantumintel.tech/glossary/photonic-qubit), topological — quantum dots occupy a distinctive niche. Their core advantage is semiconductor compatibility: they can, in principle, be fabricated using adapted versions of the same processes that produce classical chips at scale.
"The real selling point of quantum dot qubits is that they're scalable," Harvey told HPCwire. "You can put a ton of them on a chip and then build a quantum computer on that chip."
The ambition Harvey and her colleagues are working toward — millions or billions of quantum dots on a coaster-sized chip — would represent a density no other qubit modality can currently approach. Superconducting systems from [IBM Quantum](https://quantumintel.tech/companies/ibm) and others operate at counts measured in the hundreds to low thousands of physical qubits today, with [Intel Quantum](https://quantumintel.tech/companies/intel) pursuing silicon spin qubits on a parallel semiconductor track. The quantum dot path Harvey is pursuing shares the silicon-compatible logic with Intel's spin qubit program, though the specific fabrication and control approaches differ.
That scalability, however, is what Harvey calls "both a feature and a bug." A chip dense with quantum dots is a chip dense with noise sources. Charge noise, magnetic noise, and cross-talk between neighboring dots all degrade qubit fidelity. Without solving the noise problem, raw qubit count is meaningless — [decoherence](https://quantumintel.tech/glossary/decoherence) will scramble any computation before it completes.
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## The Noise Problem Is the Research
Harvey's research isn't just about fabricating dots — it's about engineering the electromagnetic and thermal environment in which they operate. The questions she's working through, as described in the HPCwire profile, include:
- What material properties best suppress charge noise in the substrate and surrounding structures?
- How should quantum dots be physically spaced to minimize inter-dot interference?
- At what operating temperature does a given quantum dot configuration perform optimally?
- What connectivity architecture links dots to external control structures without introducing noise from those structures?
- What software control stack is required to manage a massive array coherently?
"You want to be able to control the qubit's energy," Harvey said. "If there's some noise that's causing the energy to fluctuate in time, you'll lose the knowledge of what your qubit is doing, lose control. And then the qubit stops being useful."
This framing maps directly onto the fault-tolerant quantum computing threshold problem. For any QEC scheme — surface codes being the leading candidate — physical qubit error rates must fall [below threshold](https://quantumintel.tech/glossary/below-threshold) before [logical qubit](https://quantumintel.tech/glossary/logical-qubit) encoding becomes worthwhile. Noise suppression at the physical layer isn't a secondary concern; it's a prerequisite for the entire fault-tolerant stack.
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## Q-NEXT and the National Lab Infrastructure Advantage
Q-NEXT, the DOE National Quantum Information Science Research Center anchored at Argonne National Laboratory, provides Harvey with collaborative infrastructure that a single university group or startup cannot replicate. The center's mandate covers quantum communication, quantum sensing, and quantum computing, with an explicit focus on developing technologies that can transmit quantum information over meaningful distances.
Harvey highlights the open, cross-disciplinary character of the SLAC Millikelvin Facility specifically. Cosmologists building cryogenic detectors for astrophysics experiments operate in the same physical space as quantum dot researchers — and the thermal management, shielding, and low-noise electronics challenges overlap significantly. "I never knew how similar the things I think about are to the people who are doing experiments for cosmology," Harvey said.
This kind of institutional adjacency is genuinely undervalued in quantum hardware development. Cryogenic engineering expertise developed for large-scale detector arrays is directly transferable to millikelvin quantum processor environments. National labs create that knowledge transfer organically in ways that most private-sector quantum teams cannot.
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## What This Means for the Broader Qubit Platform Race
The quantum dot story at SLAC is a useful counterweight to the headline-driven coverage of superconducting and trapped-ion systems. Neither modality has demonstrated a clear path to the qubit counts — at the error rates — required for [fault-tolerant quantum computing](https://quantumintel.tech/glossary/fault-tolerant-quantum-computing) at scale. Quantum dots represent a longer-horizon bet: lower current performance on individual qubit metrics, but a potential scaling trajectory that no other platform can match if the noise engineering problems are solved.
The source material does not provide specific gate fidelity, T1/T2 coherence times, or error rate data for Harvey's current quantum dot devices — which is itself worth noting. The research described here is materials and fabrication science upstream of system-level benchmarking. That's appropriate for where the platform is: the hard work right now is creating the conditions under which good qubits can eventually be characterized, not publishing CLOPS numbers on systems that don't yet exist at scale.
For investors and enterprise buyers, the practical signal is this: quantum dot qubits remain a research-stage platform with a compelling long-term scaling argument but no near-term commercial timeline. The value of Q-NEXT's work is in building the foundational fabrication and noise-engineering knowledge that will determine whether silicon-compatible quantum computing becomes viable in the decade ahead.
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## Key Takeaways
- **Shannon Harvey** at SLAC National Accelerator Laboratory is developing quantum dot qubits under the Q-NEXT DOE research center, led by Argonne National Laboratory.
- Quantum dots are **semiconductor-compatible and mass-producible**, targeting chip densities of millions to billions of qubits per coaster-sized chip — a density argument no other modality currently matches.
- The central engineering challenge is **noise suppression**: charge and magnetic noise cause energy fluctuations that destroy qubit coherence, making dense arrays unreliable without active mitigation.
- Harvey's work spans materials science, cryogenic engineering, control software, and basic physics — a multidisciplinary profile that reflects the platform's complexity.
- The SLAC Millikelvin Facility's co-location with cosmology detector teams creates **cross-disciplinary knowledge transfer** in cryogenic engineering directly applicable to quantum hardware.
- No specific qubit performance metrics (gate fidelity, T1/T2, error rates) are reported in the current source — the work is at the fabrication and noise-characterization stage, upstream of system benchmarking.
- Quantum dots represent a **long-horizon platform bet**: weaker near-term metrics than superconducting or trapped-ion systems, but a potentially superior scaling trajectory if foundational noise problems are solved.
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## Frequently Asked Questions
**What is a quantum dot qubit?**
A quantum dot qubit is formed by confining an electron — or another charge carrier — to a space smaller than its own quantum mechanical wavelength. This confinement forces the particle into discrete, controllable energy states that can encode quantum information. Because quantum dots can be fabricated using semiconductor processes, they are considered one of the more scalable qubit modalities for eventual large-scale quantum computers.
**Why are quantum dots considered scalable compared to other qubit types?**
Quantum dots are compatible with existing semiconductor fabrication infrastructure, meaning they can, in principle, be produced in the millions or billions on a single chip — similar to how classical transistors are manufactured. Superconducting and trapped-ion systems face significant engineering barriers to reaching comparable densities. The Q-NEXT research at SLAC is working toward chips that could host millions or even billions of quantum dots on a surface the size of a drink coaster, according to Shannon Harvey.
**What is the biggest obstacle to quantum dot qubit performance?**
Noise. A chip densely packed with quantum dots is also densely packed with noise sources — charge fluctuations, magnetic interference, and cross-talk between neighboring dots. This noise causes a qubit's energy to fluctuate unpredictably over time, destroying coherence and making the qubit uncontrollable. Suppressing this noise while maintaining scalability is the core engineering challenge Harvey's research addresses.
**What is Q-NEXT and what role does it play in this research?**
Q-NEXT is a DOE National Quantum Information Science Research Center led by Argonne National Laboratory, with SLAC as a partner institution. It functions as a national research hub focused on developing quantum communication, sensing, and computing technologies. Harvey's quantum dot fabrication work is conducted under this collaborative framework, giving her access to shared infrastructure and cross-disciplinary expertise across multiple national laboratories.
**How does quantum dot research fit into the broader fault-tolerant quantum computing roadmap?**
Fault-tolerant quantum computing requires physical qubit error rates to fall below the error threshold for a given quantum error correction code before logical qubits can be reliably encoded. Quantum dot research at this stage is focused on the foundational noise engineering that will determine whether that threshold can eventually be reached at scale. The platform has not yet demonstrated the per-gate fidelity benchmarks that superconducting or trapped-ion systems have published, but its scaling argument — if the noise problem is solved — would be difficult for other modalities to match.
RESEARCH
SLAC's Shannon Harvey Targets Billion-Qubit Quantum Dot Chips
Published: July 14, 2026 at 13:50 EDTLast updated: July 15, 2026 at 03:46 EDTBy Jonas Vogel, Senior EditorLast reviewed by Jonas Vogel on July 15, 20269 min read
SLAC scientist Shannon Harvey targets chip-scale quantum dots that could pack millions or billions of qubits onto a coaster-sized chip.
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